Heretofore, when an electronic device such as a semiconductor device is installed in a circuit formed on a substrate, it has been the practice to bond the electronic device to the substrate using a solder layer of which lead (Pb) is a principal component to form an electrical or electronic circuit. Such a Pb containing solder layer that is low in resistance has been used to bond an electronic device to the circuit.
However, solders consisting of Pb or tin (Sn) are tending to be prohibited from use in recent years. Especially in Europe, their use has been banned since Jul. 1, 2006 by the RoHS Directive (directive of the European Assembly and Directorate on restriction of the use of certain hazardous substances in electrical and electronic equipment). Consequently, as alternatives of the Pb containing solder, solders that contain Pb unavoidably, that is, lead free solders, such as those formed of Au—Sn, Ag—Sn, In—Sn, Zn—Sn and Bi—Sn have been proposed.
Nonpatent References 1 and 2 listed infra report on electrical adhesiveness to semiconductors of An—Sn or the like as a Pb free ohmic electrode material. Nonpatent Reference 3 listed infra reports shapes of a bump electrode formed of Au—Sn semiconductor layer.
Also, with development of integration of electronic circuits in recent years, electronic devices driven by high electric power are wanted. An electronic device such as of semiconductor driven by high electric power is large in heat value while it is driven so that its electrical properties may come to be changed by the heat generated. Further, since a solder for bonding a semiconductor device, a radiator plate, and a semiconductor device and a radiator plate normally varies in coefficient of thermal expansion with objects to be bonded, if heat developed of the semiconductor device is large an inconvenience is caused such as that the semiconductor device or solder may come off from the radiator plate. For this reason, a variety of measures have been devised to emit the heat developed. For examples a semiconductor device to be packaged on a substrate is mounted on a substrate that is high in heat conductivity enough to be a radiator plate or heat sink, to efficiently dissipate the heat developed from the semiconductor device. Also, in order to improve heat dissipation characteristics and to dissipate the heat developed from an electronic device driven by higher electric power, a substrate higher in heat conductivity, that is, a submount having a submount substrate may be interposed between the semiconductor device and a radiator plate in the package. Such a substrate higher in heat conductivity can be of aluminum nitride (AlN).
Patent Reference 1 listed infra discloses a submount in which an adherent layer of Ti (titanium) and Pt (platinum), an electrode layer of Au (gold), a solder barrier layer of Pt (platinum) and a solder layer of Au—Sn are laid on top of another on a portion of a sintered aluminum nitride substrate.
Patent Reference 2 infra by the present inventors discloses a submount that comprises a sintered aluminum nitride substrate, an electrode layer formed on a surface of the sintered aluminum nitride substrate and a solder layer formed on the electrode layer. In this submount, it is taught that by reducing the carbon concentration at an interface between the sintered aluminum nitride substrate and/or the electrode layer and at an interface between the electrode layer and the solder layer to 1×1020 atoms/cm3 or less, it is possible to improve the adherence between the sintered aluminum nitride substrate and the electrode layer formed on its surface and/or the electrode layer and the solder layer.    [Patent Reference 1] Japanese Patent Laid Open Application, JP 2003-258360 A    [Patent Reference 2] Japanese Patent Laid Open Application, JP 2006-286944 A    [Nonpatent Reference 1] L. BUENE and 4 others, “ALLOYING BEHAVIOR of Au—In AND Au—Sn FILMS ON SEMICONDUCTORS”, Thin Solid Films, Vol. 34(1), pp. 149-152, 1976    [Nonpatent Reference 2] S. Knight and 1 other, “OHMIC CONTACTS FOR GALLIUM ARSENIDE BULK EFFECT DEVICES”, Symposium on Ohmic Contacts, pp. 102-114, 1969    [Nonpatent Reference 3] M. Hutter and 6 others, “Calculation of Shape and Experimental Creation of AuSn Solder Bumps for Flip Chip Applications”, IEEE Electronic Components and Technology Conference, pp. 282-288, 2002